The invention relates to frequency synthesizers, and relates in particular to charge pump circuits for use in a phase locked loop frequency synthesizer.
Frequency synthesizers may be used, for example, in radio frequency communication systems. Phase locked loops (PLLs) may be used in myriad applications including frequency synthesizers, as well as data recovery and clock recovery in further communication systems.
Typically, a PLL having a charge pump (a type II PLL) includes a phase detector, a charge pump circuit, a loop filter and a voltage-controlled oscillator (VCO). The phase detector detects differences in phase between an input reference signal and a feedback signal from the VCO. The charge pump circuit generates either a positive current source, e.g., of fixed value IUP, to add charge to the loop filter or a negative current source, e.g., of a fixed value IDOWN, to remove charge from the loop filter responsive to an error signal that is output by the phase detector. The VCO uses the control voltage across the loop filter to minimize the frequency difference between the PLL feedback signal and the input reference signal.
The performance of the PLL frequency synthesizer will depend on the performance of the charge pump circuit. In certain applications, it is important that the charge pump circuit provide very closely matched up (IUP) and down (IDOWN) fixed currents for balancing. An approach to providing matched currents in a PLL charge pump circuit is to provide separate reference and replication feedback circuits. For example, U.S. Pat. No. 6,107,889 discloses a charge pump circuit 200 for a frequency synthesizer that includes a reference current loop 202 that produces a bias current that flows through transistor 208, and a replication loop 204 that includes two feedback loops that force an output transistor 230 to have the same bias condition as a transistor 228 as shown in FIG. 1. The circuit 200 utilizes the second feedback replication loop 204 as well as the reference current loop 202 to establish identical bias conditions on the transistor 208 as an output transistor 214. The current sources of the circuit 200 are well matched, particularly if the components are matched. If, however, some components are not well matched (e.g., transistors 208 and 214 are not well matched or transistors 228 and 230 are not well matched), then the circuit 200 may not provide sufficiently matched current sources in certain situations.
There is a need, therefore, for a charge pump circuit that provides matched source currents when the components of the circuit are not matched.
There is also a need for a charge pump circuit that is efficient and economical to produce.